1. Field of the Invention
The present invention relates to a frequency demodulating circuit, optical disk apparatus and preformatting device.
2. Description of Related Art
In the conventional art, an optical disk has been proposed in which frequency modulation of biphase modulated address information ADM is performed and grooves are recorded in a wobbling state corresponding to the post-modulated signal. This groove wobble as shown in FIG. 40 may for instance, when the digital data is "1" per one bit (biphase 1 bit) of the address information ADM, become 4.25 waves (period of 4.25 on the sine wave), whereas when the digital data is "0" per a biphase 1 bit of the address information ADM, the groove wobble becomes 3.75 waves (period of 3.75 on the sine wave). In this case, the groove wobble is a fixed amount regardless of the frequencies of the post-modulated signals.
FIG. 41 is a block diagram showing a sample layout of a frequency demodulating circuit 100 of the conventional art used to acquire address information ADM from a groove wobble reproduction signal, in other words a wobble signal SWB. This frequency demodulating circuit 100 contains a capacitor 101 for blocking the DC component, and a comparator 102 for converting the wobble signal SWB into the binary signal PWB whose DC component has been removed by setting a threshold value of zero.
Also, the frequency demodulating circuit 100 includes a voltage-controlled oscillator 103a, a phase comparator 103b, and also a low-pass filter 103c, which constitute a PLL (phase-locked loop) circuit 103. The phase comparator 103b compares the phases of the output signal of this voltage-controlled oscillator 103a and the pulse signal PWB output from the comparator 102. The low-pass filter 103c derives the low frequency component of the phase error signal output from this phase comparator 103b in order to obtain a control signal which is supplied to the voltage controlled oscillator 103a.
This frequency demodulating circuit 100 also contains another low-pass filter 104 for deriving the low frequency component of an output signal from the low-pass filter 103c; another capacitor 105 for removing the DC component; and another comparator 106 to acquire the address information ADM from the output signal of the low-pass filter 104, whose DC component is removed while setting a threshold value of zero.
Also, the frequency demodulating circuit 100 contains an edge detector 107 for detecting a rising edge and falling edge of the address information ADM output from the comparator 106; and a monostable multivibrator 108 capable of obtaining a pulse signal of a predetermined width while using an edge detection signal output from his edge detector 107.
The frequency demodulating circuit 100 further includes another voltage-controlled oscillator 109a, another phase comparator 109b, and another low-pass filter 109c, which constitutes another PLL circuit 109. The phase comparator 109b executes a phase comparison between the output signal of this voltage-controlled oscillator 109a and the pulse signal output from the monostable multivibrator 108. The low-pass filter 109c derives a low frequency component from a phase error signal output from this phase comparator 109b in order to produce a control signal which is supplied to the voltage-controlled oscillator 109a.
The operation of the frequency demodulating circuit 100 shown in FIG. 41 will next be described. The wobble signal SWB is supplied via the capacitor 101 to the comparator 102 in order to be converted into a binary signal PWB. As previously described, the address information ADM which has been biphase-modulated is frequency-modulated, and this frequency-modulated signal is recorded as a groove wobble on the optical disk. As a result, as shown in FIG. 42A, the wobble signal SWB has 4.25 waves when the digital data is "1", and has 3.75 waves when the digital data is "0" in correspondence with the 1 bit (biphase 1 bit) of the address information ADM similar to the frequency-modulated signal. Such a binary signal PWB as shown in FIG. 42B is therefore output from the comparator 102.
On the other hand, since the frequency of the wobble signal SWB corresponding to "1" is different from the frequency of the wobble signal SWB corresponding to "0", the output signal of the low-pass filter 103c which constitutes the PLL circuit 103 is shown in FIG. 42C. As a result, the address information ADM is produced from the low-pass filter 106, as indicated in FIG. 42D. The edge of this address information ADM is then detected by the edge detector 107. The edge detection signal is supplied as a trigger signal to the PLL circuit 109 and the pulse signal output from the monostable multivibrator 108 is supplied as a reference signal to this PLL circuit 109. As a result, a clock signal "ACK" which is synchronized with the address information is acquired from the voltage-controlled oscillator 109a to constitute the PLL circuit 109 as shown in FIG. 42E.
As previously described, the frequency demodulating circuit 100 shown in FIG. 41 has two signal systems of the PLL circuits 103 and 109 which constitute an overly complex circuit configuration.
As explained previously, the amplitude of the wobble groove recorded on the optical disk is a fixed amount regardless of the frequency of the signal after modulation so that as shown in the enlarged view in FIG. 40, a change in the slope (or deflection) occurs at the zero crosspoint of the groove wobble corresponding to the junction of the "1" and the "0" of the address information ADM. Consequently, large jitter is prone to occur on the time axis of the wobble signal SWB that matches the junction point of the "1" and the "0" of the address information ADM. This jitter prevents the demodulation circuit from acquiring error-free address information ADM.
The assignee of this invention and others are currently in the midst of developing the next generation of optical magnetic disks (ASMO) and are proposing an magneto-optical disk in which clock marks hold address information by means of the groove wobbles and preformatting is performed. In this previously undisclosed magneto-optical disk apparatus, a data clock signal is acquired in order to record and reproduce data by utilizing the reproduction signal of this clock mark.
A reproduction signal SCM of the clock marks is shown in FIG. 43A. This reproduction signal SCM functions as shown in FIG. 43B to form a PCM signal showing the timing of the zero (0) crosspoint. A data clock signal is acquired by means of the PLL circuit while referring to this pulse PCM signal.
The above mentioned clock mark CM is formed as shown in FIGS. 44A and 44B while using a pair of cutting beams to cut-formed the surface of the base disk. Writing is performed radially across the surface of the disk base with a lands 12L and a grooves 12b being alternately formed. The groove 12G is cut to a specified depth Da as shown in the cross sectional view in FIG. 44B by using the cutting beams. Excluding the beams Ba, Bb, FIG. 44 shows a lateral reduction of one-tenth when the vertical direction is set as 1, just the same as in FIG. 45 related later.
The flat surface is one side of the cutting edge 11a in the groove 12G and the other cutting edge 11b is wobbled. The address information (shown by sine wave) ADM and the clockmark CM (one cycle of sine wave ) are consecutively formed in this address information ADM (shown by sine wave).
One pair of cutting beams Ba, Bb is used as shown in FIG. 44A as the cutting beams for performing wobble cutting. The cutting beams Ba, Bb scan the surface of the base disk in a partially overlapping state as shown in the figure. In this example, a groove wobble is formed by means of the cutting beam Ba.
When reproducing the clock mark CM formed in the groove 12G in the groove wobble by means of the PPB beam shown in FIG. 45, both the reproduction signal SCM of the clock mark CM acquired during scanning of the land 12L and the reproduction signal SCM of the clock mark CM acquired during scanning of the groove 12G form signals of identical polarity as shown in FIG. 43A.
Accordingly, whether the beam PPB is scanning above the land 12L or scanning above the groove 12G cannot currently be determined by means of this reproduction signal SCM. However, if it can be determined from the polarity of the reproduction signal SCM, whether the beam PPB is currently scanning above the land 12L or scanning above the groove 12G, and servo control of the optical pickup system can then be accurately performed.
Further, as related above, the amplitude Wa (FIG. 44A, of the clock mark formed in the groove 12G by means of the wobble groove, is extremely small. The clock mark CM for the reproduction signal SCM shown in FIG. 43A has a poor signal to noise ratio. Accordingly, the clock signal acquired by using this reproduction signal SCM has a large jitter and for instance cannot be used as a clock signal for data reproduction. Further, control of the first cutting beam Ba is difficult since the clock signal must be formed accompanied by drastic level fluctuations of the zero cross point, the smaller the amplitude Wa.